Regarding Elpida Memory
Regarding contact windows for various inquiries
Regarding Elpida memory products
Technical questions regarding DRAM
DRAM in general
Modules
Pin handling
Operating frequency, CAS latency (CL)
Initialization
Mode register
Refresh
Burst operation
IBIS Model
Regarding PC expansion memory
Regarding documents (data sheets, technical documents)
Regarding Elpida Memory
 What is the origin of your company name?
- The "Elpida" in the "Elpida Memory, Inc." corporate name is based on a Greek word that means "expectation". The last two letters of our name (the "d" and the "a") are taken from the first two letters of the words "dynamic" and "association" to indicate that our company is an energetic collaboration of several Japanese semiconductor makers.
"Elpida" also represents the idea that we are a Japanese DRAM maker that intends to achieve a dynamic association with many corporate partners and private/public enterprises related to our business and that we anticipate strong growth to accompany "expectation".
- Please disclose the financial information for Elpida.
- Please refer to Elpida's Investor Relations web page.
Regarding contact windows for various inquiries
- Where should I direct technical questions about products?
- Technical questions should be directed to the product-related contact (info@elpida.com).
You can also refer to the Elpida website, which lists the various contacts on its contacts page (http://www.elpida.com/en/contacts/).
- Where should I direct inquiries about personnel and hiring?
- Questions related to hiring should be sent to the contact in charge of personnel and hiring (recruit@elpida.com).
- Where should I direct inquiries about purchasing products as an individual?
- Unfortunately we do not have a sales window for individual users at this time.
- I would like to establish a business relation with Elpida. What section should I contact?
- To purchase products, contact your local sales offices.
Regarding Elpida memory products
- Tell me about the product development status and production status.
- For product development status and production status information, refer to the Elpida website. (http://www.elpida.com/en/products/)
For further information, contact your Elpida sales representative.
- What are the meanings of part numbers?
- The Elpida part numbering system is described below. Please refer to that explanation.
Part Number Decoder (PDF: 104KB)
- Can you tell me about substitute products?
- Please contact your sales representative.
- Can I return or replace products? (Warranty)
- Please contact the seller of the product.
- Are Elpida products also sold to individuals?
- Unfortunately we do not have a sales window for individual users at this time.
- Please tell me about prospects in the DRAM market.
- An outline of the DRAM market is published on the System Memory Trends page in the Elpida website.
For information about particular products, contact your Elpida sales representative.
- Tell me about the status of your lead-free program.
- Please contact your Elpida sales representative.
Technical questions regarding DRAM
DRAM in general
- What are the different types of DRAM?
-
- FPM (Fast Page Mode) DRAM
Asynchronous DRAM.
DRAM with high-speed access function called fast page mode.
- EDO (Extended Data Out) DRAM
Asynchronous DRAM.
DRAM with high-speed access function called EDO. (DRAM designed for higher access speed during read, by extending the data output timing through the fast page mode)
- Synchronous DRAM (SDRAM)
Clock-synchronous DRAM.
Memory operation is controlled through commands.
There are the following 3 types of SDRAM, which differ in their power supply voltage, pre-fetch operation, etc.
| |
SDR |
DDR |
DDR2 |
| External clock |
66 to 133MHz |
100 to 200MHz |
200 to 400MHz |
| Data transfer speed |
66 to 133Mbps |
200 to 400Mbps |
400 to 800Mbps |
| Power supply voltage |
3.3V |
2.5V |
1.8V |
| Prefetch |
1 |
2 |
4 |
| Burst length |
1, 2, 4, 8, full page |
2, 4, 8 |
4, 8 |
| Package |
TSOP |
TSOP |
BGA |
- RDRAM (Rambus DRAM)
High-speed DRAM that uses the Rambus high-speed interface technology developed by Rambus, Inc. (US). The reduction in the number of signal lines enables high-speed operation. The data transfer speed is 600 to 1200 Mega bit per second (Mbps).
- What are the different DRAM speed standards?
- The standard systems differ depending on whether the DRAM is implemented as a component or as a memory module.
Furthermore, DRAM comprises a number of different types, i.e. SDR SDRAM, DDR SDRAM, and RDRAM.
- SDRAM
| Category |
Spec. |
External Clock |
Data Transfer Speed |
| Component |
PC66 |
66MHz |
66Mbps |
| PC100 |
100MHz |
100Mbps |
| PC133 |
133MHz |
133Mbps |
| Module |
PC66 |
66MHz |
500MB/s |
| PC100 |
100MHz |
800MB/s |
| PC133 |
133MHz |
1GB/s |
- DDR
| Category |
Spec. |
External Clock |
Data Transfer Speed |
| Component |
DDR200 |
100MHz |
200Mbps |
| DDR266 |
133MHz |
266Mbps |
| DDR333 |
166MHz |
333Mbps |
| DDR400 |
200MHz |
400Mbps |
| Module |
PC1600 |
100MHz |
1.6GB/s |
| PC2100 |
133MHz |
2.1GB/s |
| PC2700 |
166MHz |
2.7GB/s |
| PC3200 |
200MHz |
3.2GB/s |
- DDR2
| Category |
Spec. |
External Clock |
Data Transfer Speed |
| Component |
DDR2-400 |
200MHz |
400Mbps |
| DDR2-533 |
266MHz |
533Mbps |
| DDR2-667 |
333MHz |
667Mbps |
| DDR2-800 |
400MHz |
800Mbps |
| Module |
PC2-3200 |
200MHz |
3.2GB/s |
| PC2-4200 |
266MHz |
4.3GB/s |
| PC2-5300 |
333MHz |
5.3GB/s |
| PC2-6400 |
400MHz |
6.4GB/s |
- RDRAM
| Category |
Spec. |
External Clock |
Data Transfer Speed |
| Component |
PC600 |
300MHz |
600Mbps |
| PC800 |
400MHz |
800Mbps |
| PC1066 |
533MHz |
1066Mbps |
| PC1200 |
600MHz |
1200Mbps |
| Module |
|
300MHz |
2.4GB/s (2ch) |
| |
400MHz |
3.6GB/s (2ch) |
| |
533MHz |
4.2GB/s (2ch) |
| |
600MHz |
4.8GB/s (2ch) |
Modules
- What is the difference between DRAM component and a memory module?
- A DRAM chip packaged in TSOP, TCP, etc., is called "component", and its capacity is normally described in "bit" units.
By contrast, a memory module consists of several DRAM components mounted on a board, allowing easy mounting in a PC, etc. The capacity of a memory module is normally described in "Byte" (= 8 bits) units.
- What is the structure of TCP?
- Normally in TSOPs, the chip is completed sealed with resin, whereas in the case of TCP (Tape Carrier Package), the chip is placed on a tape with its reverse face exposed. Elpida's TCP is an original Elpida package technology specially designed for modules, which enables stacking without increasing the module profile.
Photo: High-density module implemented with TCP stacking |
- What sockets do you recommend for modules?
- Elpida does not recommend any particular socket. For information about the various module sockets available, consult the respective manufacturers.
- What is SPD?
- SPD, which stands for Serial Presence Detect, is also called serial PD. It consists of serial (1-bit I/O) EEPROM, and contains memory module specification information such as the DRAM type, capacity, and access speed. On the PC side, by reading the SPD, it is possible to automatically set the appropriate timing for the module in question.
For the data stored in the SPD of particular products, refer to Serial PD Matrix in the product data sheet.
- How does a x64-bit configuration memory module differ from a x72-bit configuration memory module?
- 72-bit configuration memory modules are an ECC-compliant memory module. This is a configuration to which redundant bits (8 bits) for capable for error correction have been added to the regular data bus width (64 bits).
- What is ECC?
- ECC stands for Error Correction Code. This is a function for capable for correcting errors while checking for data errors in memory.
Concretely, ECC is "send data" that includes redundant bits for capable for detecting the existence of errors that occur during transfer at the side that receives the data, and it is capable for correcting back the data to the original correct data based on given rules.
- What is the difference between a registered module and an unbuffered module?
- A registered module is a memory module that performs data transfer via registers on the memory module.
Since the address and command signals are stored once to the registers so they can be output all at the same time, in synchronization with the PLL, stable signal transmission is possible even if the number of components added to the module increases. Thus, registered modules are ideal for servers and workstations that require large capacities and high reliability. By contrast, unbuffered modules use a configuration without the registers described above, and they are used mainly in PCs.
Pin handling
- How should NC/NU/RFU/MCL pins be handled?
- NC: No internal connection present. NC pins are mutually independent (separate). No specific requirement for pin handling.
NU: Not Usable. Leave it open.
MCL: Must connect Low. Pull down to VSS/VSSQ.
RFU: Reserved for Future Use. Leave it open.
- How should address pins and other unused pins be handled during design?
- Fix the input level of unused pins either to high or low level.
No connection for CMOS devices input pins can be a cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry.
Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin.
For products whose data sheet contains a "Handling of Unused Pins", be sure to observe the described directions.
- In DDR2, /DQS, RDQS, /RDQS can be enabled or disabled by EMRS.
 How should these pins be handled when disabled?
- Leave them open. (These are NU pins when disabled.)
Operating frequency, CAS latency (CL)
- What is the minimum value for the operating frequency of DDR SDRAM?
- The minimum value for the operating frequency of DDR SDRAM differs depending on the DLL circuit specifications.
For the minimum value for the operating frequency of particular products, refer to the ratings for the clock cycle time (tCK) described in each product's data sheet.
- What is the CAS latency?
- The CAS latency indicates the number of clocks required after a column address is given until the data is read. When CL = 2, the data is output 2 clocks later, and when CL = 3, it is output 3 clocks later.
- What is the relationship between the operating frequency and CAS latency (CL)?
- Even for the same product, the CAS latency differs according to the operating frequency that is used.
For example, assuming SDRAM for which 20ns is required until the data is read out after its address is given,
- If operating frequency = 100 MHz (1 clock = 10.0ns)
>> operation with CAS latency = 2 (CL = 2) results.
- If operating frequency = 133MHz (1 clock = 7.5ns)
>> operation with CAS latency = 3 (CL = 3) results.
For the relationship between the operating frequency and CAS latency of particular products, refer to Relationship Between Frequency and Minimum Latency in the data sheet.
Initialization
- What is initialization?
- Since the logic state of the DRAM internal circuit immediately after power application is undefined, initialization must be performed in order to secure normal operation. If initialization is not performed accurately, the device may not function normally.
For the initialization method, refer to 3.2 Initializing in the user's manual, or to Power-up Sequence in the product data sheet.
- The descriptions of initialization in the user's manual and in the data sheet differ. Why?
- User's manual provide only general descriptions regarding the usage of the product as a document designed to foster the understanding of users. Therefore, depending on the product, the described contents may on occasion not match actual product specifications. Please use user's manuals as reference documents for learning about general contents such as product functions and usage.
If the contents of the user's manual and those of the data sheet do not agree with each other, the ratings in the data sheet should be given precedence.
Mode register
- What is the mode register?
- The mode register stores the operation mode information of SDRAM.
The stored SDRAM operation mode information includes burst length, wrap type, latency mode (CAS latency), and other options. To store information to this register, execute the mode register setting cycle and use addresses A0 to Ax as input data.
For the mode register setting method, refer to 4.1 Mode Register Setting in the user's manual, or Mode Register Configuration in the data sheet.
- Until when are the mode register settings maintained?
- Once the mode register is set, the set data is held until it is set again or the power-off.
Refresh
- What is self-refresh?
- The self-refresh operation deactivates the clock to reduce the power consumption of the device, and it automatically executes a refresh operation by using the internal refresh counter. The self-refresh mode is effective when not accessing the device for a long time although the data must be held.
For the details of the self-refresh mode, refer to 9.2.3 Self-refresh mode in the user's manual or to Self-refresh in the product data sheet.
- What is auto refresh?
- Auto refresh is a command that refreshes DRAM. When the auto refresh command is input, a row addressNote is selected and refresh is executed. To hold the data, auto refresh must be executed the number of times corresponding to the number of row addresses within the stipulated time for the refresh cycle (tREF). (In the case of 8,192/64 ms, auto refresh must be performed 8,192 times within 64 ms.)
When auto refresh ends, the device automatically goes into the idle status.
| Note |
Since the refresh counter in the DRAM automatically generates refresh addresses, address specification from external is not required (addresses cannot be specified). |
For more detailed information on auto refresh, refer to 7.3 Refresh in the user's manual, or Auto-refresh in the product data sheet.
- What is the meaning of the refresh cycle (xxK/xxms)?
- The refresh cycle rules are written as 8,192/64ms (or 8K/64ms), for example. This means that 8,192 refresh cycles must be performed within 64ms to hold the data in the memory cells.
- What are distributed refresh and burst refresh?
- Distributed refresh and burst refresh are typical refresh methods.
Distributed refresh is a method in which refresh cycles are periodically executed at equal intervals. For example, if the refresh cycle is 8,192/64ms, 8,192 refreshes are performed within 64ms at regular intervals of 7.8us.
Burst refresh is a method in which refresh cycles are executed in succession within a given period. For example, if the refresh cycle is 8,192/64ms, 8,192 refreshes are performed in succession over a short time within 64ms.
Burst operation
- What is the burst length for full-page burst?
- The burst length during full-page burst is the same as the column addresses. For example, in the case of a product with column addresses A0 to A8 (2^9=512), the burst length is 512.
In full-page burst operation, when access of the last address ends, the beginning of the page is returned to and access begins a new. This operation is repeated until the burst stop command is input.
- After the burst length reaches the end during read or write, what status is the memory in?
- This depends on the burst length setting.
- In case of burst length of 1, 2, 4, or 8
During read: After the data of the last address is output, data output goes into high impedance.
During write: After data has been input to the last address, the operation is completed.
- In case of full-page mode
During burst operation, upon the end of access of the last address, the beginning of the page is returned to and access starts anew. This operation is repeated until the burst stop command is input.
- Can the start address for full-page burst be specified?
- The start address of full-page burst can be made to start at any column address in the page by specifying a row address and column address.
IBIS
- Can I use same IBIS model for different speed grade ?
- IBIS model is not speed dependent. You can use same IBIS model for different speed grade.
But in a case VDD conditon is different (e.g. high speed parts), Elpida provides different IBIS model.
- There seem to be several IBIS models for DDR2 SDRAM. How do I use those models ?
- We provide several IBIS models depending on DQ, DQS, /DQS condition.
(Driver strength variation when they are drivers, and ODT variation when they are recievers)
| |
Driver strength |
ODT |
DQ, DQS, /DQS model_type |
| 1 |
Normal |
OFF |
i/o |
| 2 |
Weak |
OFF |
i/o |
| 3 |
– |
50ohm |
input |
| 4 |
– |
75ohm |
input |
| 5 |
– |
150ohm |
input |
- When DQ, DQS, /DQS are driver pins (READ access), 1&2 are used for DQ, DQS, /DQS simulation. (ODT off only)
- When DQ, DQS, /DQS are receiver pins, following models are used for DQ, DQS, /DQS simulation.
ODT OFF: 1 or 2
ODT ON: 3, 4, 5
Regarding PC expansion memory
- What is the appropriate expansion memory for my PC?
- For details about your PC's specifications and memory expansion, contact the manufacturer of your PC or a PC retailer.
- Why doesn't my PC detect the expansion memory I added?
- For details about your PC's specifications and memory expansion, contact the manufacturer of your PC or a PC retailer.
Regarding documents (data sheets, technical documents)
- How can I obtain a data book (collection of data sheets)?
- Unfortunately, Elpida does not make data books.
Refer to Elpida's website (http://www.elpida.com/en/products/) or the DRAM Selection Guide.
- How can I obtain data sheets?
- Data sheets are released as PDF files in the DRAM Information page in Elpida's website (http://www.elpida.com/en/products/).
For products not listed there, contact your Elpida sales representative.
- How can I obtain printed data sheets?
- Unfortunately, Elpida does not distribute paper data sheets. Elpida dada sheets are available in PDF form only.
Data sheet PDF files are available at Elpida's website. (http://www.elpida.com/en/products/)
- How do data sheet (DS) and user's manuals (UM) differ? Also, how are they respectively used?
- User's manual provide only general descriptions regarding the usage of the product as a document designed to foster the understanding of users. Therefore, depending on the product, the described contents may on occasion not match actual product specifications. Please use user's manuals as reference documents for learning about general contents such as product functions and usage.
Data sheets describe mainly concrete specifications and ratings necessary during design. Therefore, only ratings may be described in some parts. Please use data sheets when wishing to check the concrete specifications of the product.
Usage
During product design, use the user's manual to gain an understanding of general contents such as product functions and usage, and use the latest data sheet to confirm the detailed specifications of the product.
If the contents of the user's manual and those of the data sheet do not agree with each other, the ratings in the data sheet should be given precedence.
- How can I obtain technical documents (soldering conditions, package drawings, reliability data, simulation models, etc.)?
- Contact your Elpida sales representative.
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