# This article has been translated from the original release in Japanese for your convenience #
Development of novel MIM capacitor material for gigabit-generation DRAM
Addition of niobium to tantalum pentoxide to achieve low temperature process & high permittivity
Hitachi, Ltd. (henceforth, Hitachi; President: Etsuhiko SHOYAMA) and Elpida Memory, Inc. (henceforth Elpida; President: Yukio SAKAMOTO) have developed a dielectric material for MIM(*1) capacitors for gigabit-generation DRAM (Dynamic Random Access Memory). Lower crystallization temperature and higher permittivity were achieved by adding niobium to tantalum pentoxide, which is already being used in production. The problem of capacitor characteristic degradation, previously encountered during MIM capacitor fabrication and caused by oxidation of the bottom electrode, can now be controlled, and high quality MIM capacitors fabricated. The technology developed is highly compatible to previous dielectric fabrication technology, and is expected to become core technology in gigabit-generation DRAM.
Many technological breakthroughs have been achieved to secure capacitor capacity along with advances in DRAM integration and decreasing dimensions. Hitachi and Elpida took the lead worldwide introducing tantalum pentoxide in capacitors from 64Mbit DRAM onwards. MIM capacitors with even greater capacity, however, will be required in next-generation gigabit DRAM, where design rules will be less than 0.1µm. With MIM capacitors, however, the heat treatment (approx. 700°C) required for the crystallization of tantalum pentoxide, was also known to cause oxidation of the bottom electrode resulting in capacitor characteristic degradation.
To overcome this problem, Hitachi's Central Research Laboratory and Elpida, jointly developed a new dielectric material suitable for MIM capacitors.
Features of the technology developed are as follows.
- Development of new capacitor material: BST (barium strontium titanate), as a high permittivity material, was considered a likely candidate, however due to the high process temperatures required, its use in MIM capacitors was found to be difficult. Instead, NST (niobia-stabilized tantalum pentoxide), which has a lower process temperature, was developed.
- Achievement of low temperature process & high permittivity: By adding 10% niobium to tantalum pentoxide, it was possible to lower the crystallization temperature to 550°C, a decrease of over 100°C compared to previous levels. By lowering the temperature, it became possible to prevent oxidation of the bottom electrode during the capacitor fabrication process, and thus no degradation in capacitor characteristics. Further, a leak current comparable to tantalum pentoxide but with a 20% or more increase in permittivity was observed, increasing device reliability. Furthermore, as the effect of niobium increases with decreasing layer thickness, it has the merit of being an ideal material for decreased dimension capacitors.
- Development of film formation technology using chemical vapor deposition method: Technology to form a thin film of tantalum pentoxide with niobium was developed by applying the chemical vapor deposition method using a cocktail source of tantalum and niobium organic materials. Further, this new dielectric material can be incorporated into current production processes without the usual additional expense or time-delay, as existing equipment for tantalum pentoxide formation can be used, and thus no major changes in current processes are incurred.
These results were obtained with a planar capacitor structure. The next step will be confirm the results for a three-dimensional structure as it exists in actual devices, and perfect the technology. This technology is expected to be a breakthrough for gigabit-generation DRAM where design rules will be less than 1µm.
This technology will be presented at the 2002 International Electron Devices Meeting (IEDM), from 9th December 2002, in San Francisco, California, U.S.A.
Explanation of Terms
- Metal-Insulator-Metal Capacitor: A capacitor that uses "M"etal in the electrode which carries out the memory operation of the DRAM. "I" is the dielectric insulating layer. As the parasitic capacitance at the electrode interface can be adjusted to zero, a higher capacity can be achieved compared to previous capacitors which used silicon in the electrode.
- Leak current: A low leak current enables the charge stored in the capacitor to be maintain longer, thus having advantages such increasing DRAM refresh time.
- Permittivity: The larger the permittivity, the greater the charge that can be stored in the capacitor.
Information in this news release is current as of the timing of the release, but may be revised later without notice.